PDF diagrams for the execution activities of the MIPS single-cycle implementation can be found here.

Instruction execution involves the following activities, which are approximately in order, though there is a fair amount of temporal overlap.

The program counter (PC) hold the address of the next instruction. The arithmetic-logic unit (ALU) performs arithmetic and logical operations such as adds and subtracts. The ALU is designed to combine two source operands to produce a result.

• Instruction fetch
  The instruction is fetched at the address specified by the PC.

• Instruction decode
  Control signals are generated to implement the instruction.

• Source operand fetch
  The register set provides two of the possible source operands for the ALU. The third comes from the sign-extended immediate field of the instruction.

• Arithmetic-logic unit (ALU) operation
  A control signals direct the ALU to perform an appropriate operation for the instruction. One source operand comes from the top register read port. Another control signal selects the second source operand from either the sign-extended immediate field of the instruction or the bottom register read port.

• Register write
  One control signal selects the destination register. Another control signal selects the source of the data to be written. A third control signal tells the register set to write the data from the selected source to the selected destination register.

• Memory read
  The address comes from the ALU, computed in the ALU Operation activity. A control signal directs memory to read data from that address. Another control signal specifies the register to be written from the rt field of the instruction. A third control signal routes the read data to the write data input of the register set. A fourth control signal tells the register set to write the data from its write data input to the selected destination register.

• Memory write
  The address comes from the ALU, computed in the ALU Operation activity. The data to be written comes from the bottom register read port, which has the contents of the register specified in the rt field of the instruction. A control signal directs the data memory to write the data at the specified address..

• Program counter (PC) update
  A new value for the PC is computed in preparation for fetching the next instruction. Part of the update, computing the address of the following instruction, is done automatically. For branches and jumps, this value is later updated under the direction of a control signal.