The PC gets a new value selected from the following.

• PC + 4 (most instructions)
• Branch target address (branch instructions)
• Jump target address from the instruction (j and jal instructions)
• Jump target address from a register (jr and jalr instructions)
• Interrupt address (syscall, external interrupts, and exceptions)

PC update may be done in more than one step. Processors typically do a simple increment (PC ← PC + 4) automatically, then make later modifications for branches, jumps, and interrupts.

The MIPS single-cycle implementation diagram does not include signal handling for register jump target addresses or interrupt addresses.