EE 5621

PROBLEM SET 4

S. G. Burns

Due: Wednesday, 27 October

Note 1: Most of the material on metallization and deposition is qualitative and you should review this material to prepare for Quiz 4.

Note 2: The following problems include some numerical calculations based upon topics in the metallization and deposition PPTs that result in basic closed form answers.

Note 3: I assume basic resistor and parallel-plate capacitor topologies as might be also found in Physics 2 and Electronic Circuits, i.e. EE 2212

Problem 1 What is the sheet resistance of the following metallization approaches for a 1 mm thick line:

(a) Al-Cu-Si where r = 3.2 mW-cm

(b) Poly Si where r = 500 mW-cm

(c) Ti-silicide where r = 25 mW-cm

(d) What is the value of a resistor L = 500 mm; W = 10 mm for each of the three materials in Parts (a), (b), and (c)

Problem 2 Assume this L = 500 mm; W = 10 mm metallization is on top of a 1 mm SiO₂ layer where the bottom “plate” is the Si substrate.

(a) What is the capacitance of this line?

(b) What is the RC product for each of the values computed in Problem 1, Part (d).

(c) Which material would be best suited for a high speed digital circuit or a wide bandwidth analog circuit and why?

Problem 3 You obviously have to make contact to the Si through a via in an SiO₂ layer.

Suppose the contact resistance R_C which is synonymous with r_c = 1 mW-cm² and the via opening is 2 mm by 2 mm.

(a) Compute the resultant contact resistance.

(b) What processing technique would you suggest to lower this contact resistance?

Problem 4 Be prepared to fill in the following table. You should have multiple entries in each window.

TECHNIQUE	ADVANTAGES	DISADVANTAGES	BEST MATERIALS
Evaporation
Sputtering
CVD
MBE